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rocket-chip/project
Henry Cook d3ccec1044 Massive update containing several months of changes from the now-defunct private chip repo.
* Adds support for a L2 cache with directory bits for tracking L1 coherence (DefaultL2Config), and new metadata-based coherence API.
* Additional tests.
* New virtual memory implementation, priviliged architecture (1.7), custom CSRs, FDivSqrt unit
* Updated TileLink protocol, NASTI protocol SHIMs.
* Lays groundwork for multiple top-level memory channels, superscalar fetch.
* Bump all submodules.
2015-07-02 14:43:30 -07:00
..
.gitignore Canonicalized sbt, updated makefiles, cleaned up submodules, minor bugfixes 2013-08-19 19:54:41 -07:00
build.properties add chisel and hardfloat back as sub-projects, bump other sub-projects 2013-09-26 12:01:46 -07:00
build.scala Change addons subproject to use .addons-dont-touch directory instead of addons 2014-09-25 06:46:06 -07:00
plugins.sbt Massive update containing several months of changes from the now-defunct private chip repo. 2015-07-02 14:43:30 -07:00