riscv/rocket-chip
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4535de2669
rocket-chip/src/main/scala/uncore
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Wesley W. Terpstra 4535de2669 rocket: use diplomatic interrupts 
This makes it possible for the PLIC to work with heterogenous cores.
2017-03-02 21:19:23 -08:00
..
agents Heterogeneous Tiles (#550) 2017-02-09 13:59:09 -08:00
ahb tilelink2: bring IntNode parameters up to the current standard 2017-03-02 21:19:22 -08:00
apb tilelink2: bring IntNode parameters up to the current standard 2017-03-02 21:19:22 -08:00
axi4 tilelink2: bring IntNode parameters up to the current standard 2017-03-02 21:19:22 -08:00
coherence copyright: ran scripts/modify-copyright 2016-11-27 22:15:43 -08:00
converters Refactor Tile to use cake pattern (#502) 2017-01-16 18:24:08 -08:00
devices rocket: use diplomatic interrupts 2017-03-02 21:19:23 -08:00
tilelink Refactor Tile to use cake pattern (#502) 2017-01-16 18:24:08 -08:00
tilelink2 build: remove the now obsolete config string 2017-03-02 21:19:23 -08:00
util Heterogeneous Tiles (#550) 2017-02-09 13:59:09 -08:00
Consts.scala rocketchip: work-around ucb-bar/chisel3#472 2017-01-31 14:20:02 -08:00
Package.scala copyright: ran scripts/modify-copyright 2016-11-27 22:15:43 -08:00