riscv/rocket-chip
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rocket-chip/src/main/scala/tilelink
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Wesley W. Terpstra 651da73d89 tilelink: it is now legal to support Acquire for UNCACHED regions 
These cases exist:
  GET_EFFECTS, PUT_EFFECTS, UNCACHEABLE && !supportsAcquire: MMIO
  UNCACHED && !supportsAcquire: speculation ok and may be cached
  UNCACHED && supportsAcquire: LLC/CacheCork applied (slave never probes)
  CACHED, TRACKED && supportsAcquire: slave might probe
2017-07-27 11:11:22 -07:00
..
Arbiter.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
AsyncCrossing.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
AtomicAutomata.scala tilelink: fix AtomicAutomata bug wrt early source reuse 2017-07-26 12:52:29 -07:00
Atomics.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
Broadcast.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
Buffer.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
Bundles.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
Bus.scala chiplink: adjust bus view to include the splitter (#886) 2017-07-24 21:41:17 -07:00
CacheCork.scala tilelink: it is now legal to support Acquire for UNCACHED regions 2017-07-27 11:11:22 -07:00
Delayer.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
Edges.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
Example.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
FIFOFixer.scala tileink: FIFOFixer should cope with zero-latency devices 2017-07-19 19:38:27 -07:00
Filter.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
Fragmenter.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
Fuzzer.scala tilelink: increase Fuzzer source reuse aggression 2017-07-26 12:37:31 -07:00
HintHandler.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
IntNodes.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
Isolation.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
Metadata.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
Monitor.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
NodeNumberer.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
Nodes.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
package.scala Combine Coreplex and System Module Hierarchies (#875) 2017-07-23 08:31:04 -07:00
Parameters.scala tilelink: it is now legal to support Acquire for UNCACHED regions 2017-07-27 11:11:22 -07:00
RAMModel.scala tilelink: fix RAMModel handling of AMOs on early source reuse (#897) 2017-07-27 11:07:13 -07:00
RationalCrossing.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
RegisterRouter.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
RegisterRouterTest.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
SourceShrinker.scala tilelink: SourceShrinker should work also for 0 latency 2017-07-26 12:37:31 -07:00
Splitter.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00
SRAM.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
ToAHB.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
ToAPB.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
ToAXI4.scala tilelink: remove obsolete addr_lo signal (#895) 2017-07-26 16:01:21 -07:00
WidthWidget.scala tilelink: cut WidthWidget from dependency on addr_lo 2017-07-26 10:31:09 -07:00
Xbar.scala Refactor package hierarchy and remove legacy bus protocol implementations (#845) 2017-07-07 10:48:16 -07:00