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Wesley W. Terpstra 11b3cee07a Ahb tweaks (#50)
* ahb: handle tlDataBytes==1 and tlDataBeats==1 gracefully

I only now learned that chisel does not handle 0-width wires properly
and that log2Up and log2Ceil differ on 1. Fix-up code to handle this.

* ahb: optionally disable atomics => optimize to nothing

Trust the compiler the compiler to optimize away unused logic.
2016-06-01 16:42:39 -07:00
uncore Ahb tweaks (#50) 2016-06-01 16:42:39 -07:00