85 lines
2.5 KiB
Scala
85 lines
2.5 KiB
Scala
// See LICENSE.SiFive for license details.
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package freechips.rocketchip.rocket
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import Chisel._
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import Chisel.ImplicitConversions._
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import freechips.rocketchip.config.Parameters
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import freechips.rocketchip.tile.{CoreModule, CoreBundle}
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import freechips.rocketchip.util._
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class BPControl(implicit p: Parameters) extends CoreBundle()(p) {
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val ttype = UInt(width = 4)
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val dmode = Bool()
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val maskmax = UInt(width = 6)
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val reserved = UInt(width = xLen-24)
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val action = Bool()
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val chain = Bool()
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val zero = UInt(width = 2)
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val tmatch = UInt(width = 2)
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val m = Bool()
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val h = Bool()
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val s = Bool()
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val u = Bool()
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val x = Bool()
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val w = Bool()
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val r = Bool()
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def tType = 2
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def maskMax = 4
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def enabled(mstatus: MStatus) = !mstatus.debug && Cat(m, h, s, u)(mstatus.prv)
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}
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class BP(implicit p: Parameters) extends CoreBundle()(p) {
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val control = new BPControl
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val address = UInt(width = vaddrBits)
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def mask(dummy: Int = 0) =
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(0 until control.maskMax-1).scanLeft(control.tmatch(0))((m, i) => m && address(i)).asUInt
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def pow2AddressMatch(x: UInt) =
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(~x | mask()) === (~address | mask())
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def rangeAddressMatch(x: UInt) =
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(x >= address) ^ control.tmatch(0)
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def addressMatch(x: UInt) =
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Mux(control.tmatch(1), rangeAddressMatch(x), pow2AddressMatch(x))
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}
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class BreakpointUnit(n: Int)(implicit p: Parameters) extends CoreModule()(p) {
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val io = new Bundle {
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val status = new MStatus().asInput
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val bp = Vec(n, new BP).asInput
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val pc = UInt(INPUT, vaddrBits)
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val ea = UInt(INPUT, vaddrBits)
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val xcpt_if = Bool(OUTPUT)
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val xcpt_ld = Bool(OUTPUT)
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val xcpt_st = Bool(OUTPUT)
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val debug_if = Bool(OUTPUT)
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val debug_ld = Bool(OUTPUT)
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val debug_st = Bool(OUTPUT)
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}
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io.xcpt_if := false
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io.xcpt_ld := false
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io.xcpt_st := false
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io.debug_if := false
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io.debug_ld := false
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io.debug_st := false
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io.bp.foldLeft((Bool(true), Bool(true), Bool(true))) { case ((ri, wi, xi), bp) =>
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val en = bp.control.enabled(io.status)
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val r = en && ri && bp.control.r && bp.addressMatch(io.ea)
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val w = en && wi && bp.control.w && bp.addressMatch(io.ea)
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val x = en && xi && bp.control.x && bp.addressMatch(io.pc)
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val end = !bp.control.chain
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when (end && r) { io.xcpt_ld := !bp.control.action; io.debug_ld := bp.control.action }
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when (end && w) { io.xcpt_st := !bp.control.action; io.debug_st := bp.control.action }
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when (end && x) { io.xcpt_if := !bp.control.action; io.debug_if := bp.control.action }
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(end || r, end || w, end || x)
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}
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}
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