riscv/rocket-chip
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Author SHA1 Message Date
Andrew Waterman 137b77d780 Merge pull request #4 from ucb-bar/chisel3 
Work around Chisel3's lack of 0-width wires
 2016-03-15 17:30:34 -07:00
Andrew Waterman 3e721fe80b Merge pull request #2 from ucb-bar/chisel3 
Pass a BitPat to Lookup
 2016-03-06 04:27:52 -08:00