7 Commits

Author	SHA1	Message	Date
Wesley W. Terpstra	76388117bb	regmapper: detect improper reset sequencing in RegisterCrossing	2016-10-10 13:13:32 -07:00
Wesley W. Terpstra	b5f5ef69c1	regmapper: eliminate race condition in RegisterCrossing bypass	2016-10-10 13:13:32 -07:00
Wesley W. Terpstra	2f6985efd3	crossings: use flip not flip() ... This seems to be the more common API	2016-10-10 13:13:31 -07:00
Wesley W. Terpstra	8c7d469a95	Revert "async_queue: Give names to all the registers which show up in the queue (#390)" ... This reverts commit a84a961a39. The changes to RegisterCrossing.scala were unneeded after application of this branch. The name changes made to the AsyncQueue.scala are reapplied at the end of this branch.	2016-10-10 13:13:31 -07:00
mwachs5	b5d4b72313	register_crossing: Remove the need for AsyncScope by specifying the master clock and reset. (#393)	2016-10-09 15:51:23 -07:00
mwachs5	a84a961a39	async_queue: Give names to all the registers which show up in the queue (#390) ... This is to aid debugging but even more so for backend constraint writers, who generally need predictable names for registers to set false paths, etc.	2016-10-08 17:50:50 -07:00
Wesley W. Terpstra	f05298d9bc	tilelink2: move general-purpose code out of tilelink2 package	2016-10-03 16:22:28 -07:00