riscv/rocket-chip
1
0
Fork 0
Code Releases Activity
3,003 Commits 1 Branch 0 Tags 13 MiB
993da60f2c
Commit Graph

29 Commits

Author SHA1 Message Date
Andrew Waterman
2906c75167 Remove fsim, as it is the same as vsim, modulo CONFIG 2016-08-09 15:42:22 -07:00
mwachs5
4465260469 Update README.md 
- List things that are no longer submodules as subpackages instead
- clean up some formatting issues
 2016-07-29 17:56:42 -07:00
mwachs5
36720d915a Update README.md (#161) 
Correct typo in heading
 2016-07-11 00:34:13 -07:00
Howard Mao
ebef4ddad0 remove mention of HTIF from README 2016-06-28 15:23:32 -07:00
Andrew Waterman
568bfa6c50 Purge legacy HTIF things 
The SCR file is gone, too, because it was tightly coupled.  The
general concept could be revived as a module that somehow connects
to the debug module.
 2016-06-23 13:23:57 -07:00
Scott Johnson
73ed4ea07b grammar 
English major I'm not, but my sister was and she says 'who' is correct here
 2016-06-08 22:34:14 -07:00
Andrew Waterman
e82c080c3c Add blocking D$ 2016-05-25 11:09:50 -07:00
Christopher Celio
3fe00ce32a Update README.md 
- Removed instruction to checkout riscv-tests (as they are now globally installed when building the riscv-tools).
- Clarified the riscv-tools set-up information to clarify that the rocket-chip/riscv-tools is the version to build.
 2016-05-10 22:12:02 -07:00
Andrew Waterman
1f211b37df WIP on new memory map 2016-04-27 14:57:54 -07:00
Scott Beamer
c19931ba03 add technical report to readme 2016-04-19 16:17:50 -07:00
Christopher Celio
e6b6ff5a1d Update README.md 
Corrected PublicConfigs.scala -> Configs.scala
 2015-09-02 22:55:53 -07:00
Christopher Celio
b1e845f370 Add space to README.md 2015-08-26 14:34:22 -07:00
Scott Beamer
b88c283b21 add travis support and tests 2015-08-25 13:29:20 -07:00
Henry Cook
d21ffa4dba Streamline makefiles for more robust test dependency generation. Note: emulator/generated-src-debug no longer used 2015-07-28 00:24:07 -07:00
Henry Cook
1e977d12f2 Update README.md 2015-07-15 16:25:04 -07:00
Yunsup Lee
4f57985198 change organization to riscv 2015-02-17 14:43:11 -08:00
RainerWasserfuhr
9b41ad92ba Update README.md 
typo?
 2014-10-08 01:46:48 +02:00
Yunsup Lee
f15baeea49 fix markdown for webpage 2014-10-07 03:55:00 -07:00
Yunsup Lee
447761b06c fix typo in README 2014-10-07 02:09:34 -07:00
Yunsup Lee
91f211f766 updates to README 2014-10-07 02:08:03 -07:00
Yunsup Lee
ae9b78d9ef add what/how explanation to README 2014-10-07 02:07:39 -07:00
Yunsup Lee
e40a6fdd64 more tweaks to README 2014-09-12 10:22:00 -07:00
Yunsup Lee
c57dea415c fix markdown 2014-09-12 10:18:14 -07:00
Yunsup Lee
1cfd9f5a0e add LICENSE 2014-09-12 10:15:04 -07:00
Yunsup Lee
2c33852c52 final touches 2014-09-12 00:19:29 -07:00
Yunsup Lee
882fecf43a update README 2014-08-31 20:57:16 -07:00
Scott Beamer
e1a4d12c65 fix small typos in README 2014-08-14 17:59:24 -07:00
Scott Beamer
d3a8a224fe README updated for new fpga flow 2014-08-07 14:52:56 -07:00
Scott Beamer
e390eba8ce convert README to markdown 2014-08-07 14:50:31 -07:00