  Richard XiaandGitHub
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cfa819fc58
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Merge pull request #1142 from freechipsproject/fix-typo-in-cover-property-name
Fix typo in breakpoint cover property.
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2017-12-04 15:10:05 -08:00 |
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Richard XiaandGitHub
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a447343074
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Merge pull request #1129 from freechipsproject/add-exception-cover-properties
Add cover properties for exceptions in the core.
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2017-11-30 16:23:14 -08:00 |
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Richard XiaandGitHub
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9e77045213
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Merge pull request #1083 from freechipsproject/bump-riscv-tools
Bump riscv-tools.
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2017-10-31 20:55:10 -07:00 |
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Richard XiaandGitHub
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680f3b1620
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Merge pull request #1060 from freechipsproject/fix-address-format
Fix address format
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2017-10-19 10:45:03 -07:00 |
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Richard XiaandGitHub
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3b36dda9e1
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Merge pull request #1059 from freechipsproject/add-supports-atomics-property
Add atomics support to DTS JSON file.
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2017-10-18 16:30:24 -07:00 |
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Richard XiaandGitHub
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ef28ce8d2f
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Merge pull request #1042 from freechipsproject/bump-riscv-tools
Bump riscv-tools.
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2017-10-10 16:31:38 -07:00 |
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Richard XiaandGitHub
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97ad528a32
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Merge pull request #941 from freechipsproject/bump-riscv-tools
Bump riscv-tools to bump riscv-tests for mi-csr test fix.
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2017-08-08 18:50:29 -07:00 |
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Richard XiaandGitHub
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9ade7af013
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Merge pull request #862 from freechipsproject/plic-max-pri-dts
PLIC: Add maxPri as well as ndev in DTS
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2017-07-13 17:08:21 -07:00 |
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Richard XiaandGitHub
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f0481801df
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Merge pull request #863 from freechipsproject/rename-offchip-interrupts-to-external-interrupts
Rename offchip-interrupts to external-interrupts.
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2017-07-13 16:52:57 -07:00 |
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Richard XiaandGitHub
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ee9789eb68
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Merge pull request #840 from freechipsproject/fix-dcache-exception-assignment-order
Make sure that DCache s2_xcpt data scratchpad case is assigned to after initial assignment.
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2017-06-30 18:50:49 -07:00 |
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Richard XiaandGitHub
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31415060fe
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Merge pull request #802 from freechipsproject/fix-decode-of-instruction-after-ebreak
Check for rvc before declaring illegal instruction after an ebreak.
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2017-06-16 15:07:24 -07:00 |
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 Richard XiaandJack Koenig
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61fbe62112
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Ignore the built firrtl.jar. (#532)
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2017-01-27 13:04:15 -08:00 |
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 Richard XiaandHenry Cook
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5244fc8433
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Bump torture to get updated submodule URL. (#488)
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2016-12-12 13:47:33 -08:00 |
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Richard XiaandGitHub
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97a853a995
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Merge pull request #459 from ucb-bar/bump-chisel-for-firrtl-jar-gitignore
Bump chisel3 by just one commit to pull in gitignore for firrtl.jar.
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2016-11-26 13:55:53 -08:00 |
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Richard XiaandGitHub
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87cbd5c893
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Merge pull request #439 from ucb-bar/add-chip-configs
Add various granular configs.
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2016-11-18 12:12:50 -08:00 |
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Richard XiaandGitHub
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81d98304dc
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Merge pull request #438 from ucb-bar/bump-riscv-tools-for-riscv-test-updates
Bump riscv-tools to bump riscv-tests to pull in OpenOCD port randomization feature.
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2016-11-16 12:26:48 -08:00 |
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Richard XiaandGitHub
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8c538f548b
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Merge pull request #422 from ucb-bar/use-random-port-for-jtag-vpi
Use random, unused port for JTAG VPI
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2016-10-26 13:16:28 -07:00 |
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 Richard XiaandAndrew Waterman
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9015276958
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Use sbt-launch.jar 0.13.12. (#262)
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2016-09-08 17:26:04 -07:00 |
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