6 Commits

Author	SHA1	Message	Date
Wesley W. Terpstra	0ae45d0f24	rocketchip: bundle (=> B) need not be delayed; Module is constructed later	2016-10-31 11:41:18 -07:00
Howard Mao	201e247f73	Factor coreplex IO connection into separate trait (#350) ... This would allow, for instance, putting the coreplex on a separate clock domain and crossing the IOs over through asynchronous queues. The ExampleMultiClockTop* classes are removed since they no longer fit into the class hierarchy.	2016-09-27 11:55:32 -07:00
Yunsup Lee	d2df6397cd	rename trc (tile reset clock) bundles to tcr (tile clock reset)	2016-09-21 18:29:28 -07:00
Yunsup Lee	7afd630d3e	add multiclock support to Coreplex	2016-09-21 16:55:26 -07:00
Henry Cook	ed91e9a89b	Merge remote-tracking branch 'origin' into testharness-refactor	2016-09-20 13:03:21 -07:00
Henry Cook	7b8aa6c839	[rocketchip] split out Base and Example tops	2016-09-19 11:00:13 -07:00