riscv/rocket-chip
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added checks for addresses > physical memory size, increased memsize to 64M

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Rimas Avizienis
2011-11-12 23:39:43 -08:00
parent 35af912bd2
commit fbd44ea936
3 changed files with 26 additions and 13 deletions
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6
rocket/src/main/scala/consts.scala
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@ -180,10 +180,10 @@ object Constants
val DTLB_ENTRIES = 8;
val ITLB_ENTRIES = 8;
// physical memory size (# 4K pages - for proxy kernel at least)
// physical memory size (# 8K pages)
// if you change this value, make sure to also change MEMORY_SIZE variable in memif.h
val MEMSIZE_PAGES = 8192; // 32 megs
val MEMSIZE = MEMSIZE_PAGES*4096;
val MEMSIZE_PAGES = 8192; // 64 megs
val MEMSIZE_BYTES = MEMSIZE_PAGES*8192;
val HAVE_FPU = Bool(false);
val HAVE_VEC = Bool(false);