riscv/rocket-chip
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Add performance counter support

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This commit is contained in:
Andrew Waterman
2016-08-26 20:27:27 -07:00
parent 1e3339e97c
commit f91552a650
5 changed files with 382 additions and 79 deletions
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4
src/main/scala/rocket/rocket.scala
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@ -28,6 +28,8 @@ case object MtvecWritable extends Field[Boolean]
case object MtvecInit extends Field[BigInt]
case object ResetVector extends Field[BigInt]
case object NBreakpoints extends Field[Int]
case object NPerfCounters extends Field[Int]
case object NPerfEvents extends Field[Int]
trait HasCoreParameters extends HasAddrMapParameters {
implicit val p: Parameters
@ -44,6 +46,8 @@ trait HasCoreParameters extends HasAddrMapParameters {
val fastLoadWord = p(FastLoadWord)
val fastLoadByte = p(FastLoadByte)
val nBreakpoints = p(NBreakpoints)
val nPerfCounters = p(NPerfCounters)
val nPerfEvents = p(NPerfEvents)
val retireWidth = p(RetireWidth)
val fetchWidth = p(FetchWidth)