Use correct kind of TileLink arbiter
It was "correct" before, but broke Chisel3 build.
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@ -114,7 +114,7 @@ class RocketTile(resetSignal: Bool = null)(implicit p: Parameters) extends Tile(
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uncachedPorts ++= roccs.flatMap(_.io.utl)
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}
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val uncachedArb = Module(new ClientTileLinkIOArbiter(uncachedArbPorts.size))
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val uncachedArb = Module(new ClientUncachedTileLinkIOArbiter(uncachedArbPorts.size))
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uncachedArb.io.in <> uncachedArbPorts
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uncachedArb.io.out +=: uncachedPorts
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