riscv/rocket-chip
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standardize IO naming convention

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This commit is contained in:
Henry Cook
2013-01-07 13:38:59 -08:00
parent 261e14f831
commit e1225c5114
14 changed files with 82 additions and 71 deletions
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12
rocket/src/main/scala/core.scala
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@ -6,17 +6,17 @@ import Constants._
import hwacha._
import Util._
class ioRocket(implicit conf: RocketConfiguration) extends Bundle
class RocketIO(implicit conf: RocketConfiguration) extends Bundle
{
val host = new ioHTIF(conf.ntiles)
val imem = new IOCPUFrontend()(conf.icache)
val vimem = new IOCPUFrontend()(conf.icache)
val dmem = new ioHellaCache()(conf.dcache)
val host = new HTIFIO(conf.lnConf.nTiles)
val imem = new CPUFrontendIO()(conf.icache)
val vimem = new CPUFrontendIO()(conf.icache)
val dmem = new HellaCacheIO()(conf.dcache)
}
class Core(implicit conf: RocketConfiguration) extends Component
{
val io = new ioRocket
val io = new RocketIO
val ctrl = new Control
val dpath = new Datapath