Support uncached AMOs in blocking D$
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@ -230,14 +230,24 @@ class DCache(implicit p: Parameters) extends L1HellaCacheModule()(p) {
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data = Fill(beatWords, pstore1_storegen.data),
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wmask = pstore1_storegen.mask << (s2_req.addr(beatOffBits-1, wordOffBits) << wordOffBits),
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alloc = Bool(false))
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val uncachedPutAtomicMessage = PutAtomic(
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client_xact_id = UInt(0),
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addr_block = s2_req.addr(paddrBits-1, blockOffBits),
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addr_beat = s2_req.addr(blockOffBits-1, beatOffBits),
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addr_byte = s2_req.addr(beatOffBits-1, 0),
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atomic_opcode = s2_req.cmd,
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operand_size = s2_req.typ,
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data = Fill(beatWords, pstore1_storegen.data))
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io.mem.acquire.valid := ((s2_valid_cached_miss && !s2_victim_dirty) || s2_valid_uncached) && fq.io.enq.ready
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io.mem.acquire.bits := cachedGetMessage
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when (s2_uncached) {
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assert(!s2_valid_masked || !s2_hit, "cache hit on uncached access")
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io.mem.acquire.bits := uncachedGetMessage
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when (isWrite(s2_req.cmd)) {
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assert(!s2_valid || !isRead(s2_req.cmd), "uncached AMOs are unsupported")
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io.mem.acquire.bits := uncachedPutMessage
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when (pstore1_amo) {
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io.mem.acquire.bits := uncachedPutAtomicMessage
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}
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}
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}
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when (io.mem.acquire.fire()) { grant_wait := true }
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