rocket: flip interrupt rendering so cores are on top
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@@ -86,7 +86,7 @@ trait HasRocketTiles extends HasSystemBus
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wrapper.intOutputNode.foreach { case int =>
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val rocketIntXing = LazyModule(new IntXing(wrapper.outputInterruptXingLatency))
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rocketIntXing.intnode := int
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FlipRendering { implicit p => rocketIntXing.intnode := int }
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plic.intnode := rocketIntXing.intnode
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}
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