From e07d86aecdcff68f35aa50f6003c72ec5f439c52 Mon Sep 17 00:00:00 2001 From: "Wesley W. Terpstra" Date: Wed, 27 Sep 2017 12:46:29 -0700 Subject: [PATCH] rocket: flip interrupt rendering so cores are on top --- src/main/scala/coreplex/RocketCoreplex.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/coreplex/RocketCoreplex.scala b/src/main/scala/coreplex/RocketCoreplex.scala index 766aee01..b4992a3c 100644 --- a/src/main/scala/coreplex/RocketCoreplex.scala +++ b/src/main/scala/coreplex/RocketCoreplex.scala @@ -86,7 +86,7 @@ trait HasRocketTiles extends HasSystemBus wrapper.intOutputNode.foreach { case int => val rocketIntXing = LazyModule(new IntXing(wrapper.outputInterruptXingLatency)) - rocketIntXing.intnode := int + FlipRendering { implicit p => rocketIntXing.intnode := int } plic.intnode := rocketIntXing.intnode }