Merge pull request #755 from freechipsproject/verilator-plusargs
Verilator plusargs
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commit
dfb6340927
@ -21,7 +21,7 @@ $(generated_dir_debug)/%.fir $(generated_dir_debug)/%.d: $(FIRRTL_JAR) $(chisel_
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$(FIRRTL) $(patsubst %,-i %,$(filter %.fir,$^)) -o $@ -X verilog
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# Build and install our own Verilator, to work around versionining issues.
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VERILATOR_VERSION=3.884
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VERILATOR_VERSION=3.904
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VERILATOR_SRCDIR ?= verilator/src/verilator-$(VERILATOR_VERSION)
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VERILATOR_TARGET := $(abspath verilator/install/bin/verilator)
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INSTALLED_VERILATOR ?= $(VERILATOR_TARGET)
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@ -10,13 +10,11 @@ reg [31:0] myplus;
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assign out = myplus;
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initial begin
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`ifdef SYNTHESIS
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myplus = DEFAULT;
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`ifndef SYNTHESIS
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`ifndef verilator
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// Work-around for https://www.veripool.org/issues/1165
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`else
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if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;
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`endif
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`endif
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end
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endmodule
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