Stub out debug module, rather than leaving it floating
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Submodule riscv-tools updated: 40a956a7a5...b8fe37d17f.
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Submodule rocket updated: 8869c1a44a...2b5831d922.
@@ -218,6 +218,10 @@ class Uncore(implicit val p: Parameters) extends Module
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val bootROMAddr = ioAddrHashMap("int:bootrom")
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bootROM.io <> mmioNetwork.io.out(bootROMAddr.port)
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val debugModule = Module(new ROMSlave(Seq())) // TODO
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val debugModuleAddr = ioAddrHashMap("int:debug")
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debugModule.io <> mmioNetwork.io.out(debugModuleAddr.port)
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TopUtils.connectTilelinkNasti(io.mmio, mmioNetwork.io.out(ioAddrHashMap("ext").port))
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}
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}
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