Add TileId parameter, generalizing GroundTestId

This usually shouldn't be used in Tiles that are meant to be P&R'd once
and multiply instantiated, as their RTL would no longer be homogeneous.
However, it is useful for conditionalizing RTL generation for
heterogeneous tiles.

src/main/scala/coreplex/Configs.scala

@@ -94,8 +94,9 @@ class BaseCoreplexConfig extends Config (
         TestGeneration.addSuites(rvi.map(_("p")))
         TestGeneration.addSuites((if(site(UseVM)) List("v") else List()).flatMap(env => rvu.map(_(env))))
         TestGeneration.addSuite(benchmarks)
-        List.fill(site(NTiles)){ (r: Bool, p: Parameters) =>
+        List.tabulate(site(NTiles)){ i => (r: Bool, p: Parameters) =>
           Module(new RocketTile(resetSignal = r)(p.alterPartial({
+            case TileId => i
             case TLId => "L1toL2"
             case NUncachedTileLinkPorts => 1 + site(RoccNMemChannels)
           })))

src/main/scala/coreplex/DirectGroundTest.scala

@@ -2,6 +2,7 @@ package coreplex
 
 import Chisel._
 import cde.{Parameters, Field}
+import rocket.TileId
 import groundtest._
 import uncore.tilelink._
 import uncore.agents._
@@ -19,7 +20,7 @@ class DirectGroundTestCoreplex(topParams: Parameters) extends Coreplex()(topPara
   require(nTiles == 1)
 
   val test = p(BuildGroundTest)(outermostParams.alterPartial({
-    case GroundTestId => 0
+    case TileId => 0
     case CacheName => "L1D"
   }))
   require(test.io.cache.size == 0)

src/main/scala/coreplex/TestConfigs.scala

@@ -158,10 +158,9 @@ class WithPCIeMockupTest extends Config(
       maxRequests = 128,
       startAddress = site(GlobalAddrMap)("mem").start)
     case BuildGroundTest =>
-      (p: Parameters) => {
-        val id = p(GroundTestId)
-        if (id == 0) Module(new GeneratorTest()(p))
-        else Module(new NastiConverterTest()(p))
+      (p: Parameters) => p(TileId) match {
+        case 0 => Module(new GeneratorTest()(p))
+        case 1 => Module(new NastiConverterTest()(p))
       }
     case _ => throw new CDEMatchError
   })

src/main/scala/groundtest/Generator.scala

@@ -190,7 +190,7 @@ class HellaCacheGenerator(id: Int)
 class GeneratorTest(implicit p: Parameters)
     extends GroundTest()(p) with HasGeneratorParameters {
 
-  val idStart = p(GroundTestKey).take(tileId)
+  val idStart = p(GroundTestKey).take(p(TileId))
     .map(settings => settings.cached + settings.uncached)
     .foldLeft(0)(_ + _)
 

src/main/scala/groundtest/NastiTest.scala

@@ -4,6 +4,7 @@ import Chisel._
 import uncore.tilelink._
 import uncore.converters._
 import junctions._
+import rocket.TileId
 import cde.Parameters
 
 class NastiGenerator(id: Int)(implicit val p: Parameters) extends Module
@@ -107,7 +108,7 @@ class NastiConverterTest(implicit p: Parameters) extends GroundTest()(p)
     with HasNastiParameters {
   require(tileSettings.uncached == 1 && tileSettings.cached == 0)
 
-  val genId = p(GroundTestKey).take(tileId)
+  val genId = p(GroundTestKey).take(p(TileId))
     .map(settings => settings.cached + settings.uncached)
     .foldLeft(0)(_ + _)
 

src/main/scala/groundtest/Tile.scala

@@ -13,7 +13,6 @@ case object BuildGroundTest extends Field[Parameters => GroundTest]
 case class GroundTestTileSettings(
   uncached: Int = 0, cached: Int = 0, ptw: Int = 0, maxXacts: Int = 1)
 case object GroundTestKey extends Field[Seq[GroundTestTileSettings]]
-case object GroundTestId extends Field[Int]
 
 trait HasGroundTestConstants {
   val timeoutCodeBits = 4
@@ -22,8 +21,7 @@ trait HasGroundTestConstants {
 
 trait HasGroundTestParameters extends HasAddrMapParameters {
   implicit val p: Parameters
-  val tileId = p(GroundTestId)
-  val tileSettings = p(GroundTestKey)(tileId)
+  val tileSettings = p(GroundTestKey)(p(TileId))
   val nUncached = tileSettings.uncached
   val nCached = tileSettings.cached
   val nPTW = tileSettings.ptw

src/main/scala/groundtest/TraceGen.scala

@@ -613,7 +613,7 @@ class GroundTestTraceGenerator(implicit p: Parameters)
   require(io.mem.size <= 1)
   require(io.cache.size == 1)
 
-  val traceGen = Module(new TraceGenerator(p(GroundTestId)))
+  val traceGen = Module(new TraceGenerator(p(TileId)))
   io.cache.head <> traceGen.io.mem
 
   if (io.mem.size == 1) {

src/main/scala/rocket/rocket.scala

@@ -71,6 +71,7 @@ trait HasCoreParameters extends HasAddrMapParameters {
   val coreMaxAddrBits = paddrBits max vaddrBitsExtended
   val nCustomMrwCsrs = p(NCustomMRWCSRs)
   val nCores = p(NTiles)
+  val tileId = p(TileId)
 
   // fetchWidth doubled, but coreInstBytes halved, for RVC
   val decodeWidth = fetchWidth / (if (usingCompressed) 2 else 1)

src/main/scala/rocket/tile.scala

@@ -12,6 +12,7 @@ import cde.{Parameters, Field}
 case object BuildRoCC extends Field[Seq[RoccParameters]]
 case object NCachedTileLinkPorts extends Field[Int]
 case object NUncachedTileLinkPorts extends Field[Int]
+case object TileId extends Field[Int]
 
 case class RoccParameters(
   opcodes: OpcodeSet,

src/main/scala/rocketchip/TestConfigs.scala

@@ -72,7 +72,7 @@ class WithGroundTest extends Config(
         (r: Bool, p: Parameters) => {
           Module(new GroundTestTile(resetSignal = r)(p.alterPartial({
             case TLId => "L1toL2"
-            case GroundTestId => i
+            case TileId => i
             case NCachedTileLinkPorts => if(tileSettings.cached > 0) 1 else 0
             case NUncachedTileLinkPorts => tileSettings.uncached
           })))