use address map instead of MMIOBase to find size of memory

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Howard Mao authored and Andrew Waterman committed 2016-04-21 18:44:39 -07:00
1 parent 2d6f35525e
commit b7527268bb
4 files changed
+9 -7

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@@ -421,8 +421,8 @@ class MSHRFile(implicit p: Parameters) extends L1HellaCacheModule()(p) {
val fence_rdy = Bool(OUTPUT)
}
// determine if the request is in the memory region or mmio region
val cacheable = io.req.bits.addr < UInt(mmioBase)
// determine if the request is cacheable or not
val cacheable = addrMap.isCacheable(io.req.bits.addr)
val sdq_val = Reg(init=Bits(0, sdqDepth))
val sdq_alloc_id = PriorityEncoder(~sdq_val(sdqDepth-1,0))