riscv/rocket-chip
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bump chisel

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This commit is contained in:
Andrew Waterman 2016-05-25 11:09:37 -07:00
parent f52fc655a5
commit a8462d3cfc
5 changed files with 8 additions and 6 deletions
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3
Makefrag
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@ -9,8 +9,7 @@ CXX ?= g++
CXXFLAGS := -O1 CXXFLAGS := -O1
CHISEL_VERSION ?= 2 CHISEL_VERSION ?= 2
CHISEL_SUBMODULE ?= chisel$(CHISEL_VERSION) export CHISEL_VERSION
export CHISEL_SUBMODULE
SBT ?= java -Xmx2G -Xss8M -XX:MaxPermSize=256M -jar sbt-launch.jar SBT ?= java -Xmx2G -Xss8M -XX:MaxPermSize=256M -jar sbt-launch.jar
SHELL := /bin/bash SHELL := /bin/bash

2
chisel2

@ -1 +1 @@
Subproject commit c736c900aed0dc71f5d1189044ef902f6a3627f6 Subproject commit e9e5bb28ac230ab7c54aab9ca30fbe164bbb84be

2
chisel3

@ -1 +1 @@
Subproject commit 3ae577bc710b3767f47403a3d055e84815a30043 Subproject commit d742d70a05b5fa997517ea7b5eb2d15b23e7a431

2
firrtl

@ -1 +1 @@
Subproject commit a73efa2f67428101cf0984a8fb8ac3ebf32b914b Subproject commit 26694d3496b7b500a3448599eb889126335b031f

5
project/build.scala
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@ -15,7 +15,10 @@ object BuildSettings extends Build {
libraryDependencies ++= Seq("org.scala-lang" % "scala-reflect" % scalaVersion.value) libraryDependencies ++= Seq("org.scala-lang" % "scala-reflect" % scalaVersion.value)
) )
lazy val chisel = project in file(sys.env.getOrElse("CHISEL_SUBMODULE", "chisel2")) lazy val chiselMacros = project in file("chisel3/chiselMacros")
lazy val chiselFrontend = project in file("chisel3/chiselFrontend")
lazy val chisel = project in file("chisel" + sys.env.getOrElse("CHISEL_VERSION", 2)) dependsOn(chiselMacros, chiselFrontend)
lazy val cde = project in file("context-dependent-environments") lazy val cde = project in file("context-dependent-environments")
lazy val hardfloat = project.dependsOn(chisel) lazy val hardfloat = project.dependsOn(chisel)
lazy val junctions = project.dependsOn(chisel, cde) lazy val junctions = project.dependsOn(chisel, cde)