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periphery: a handy trait to turn-off ExtMem

This commit is contained in:
Wesley W. Terpstra 2016-11-23 18:53:22 -08:00
parent 30e890b480
commit a670f63c81

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@ -72,6 +72,14 @@ trait PeripheryExtInterruptsModule {
///// /////
trait PeripheryNoMem extends TopNetwork {
private val channels = p(BankedL2Config).nMemoryChannels
require (channels == 0)
val mem = Seq()
}
/////
trait PeripheryMasterAXI4Mem { trait PeripheryMasterAXI4Mem {
this: TopNetwork => this: TopNetwork =>
val module: PeripheryMasterAXI4MemModule val module: PeripheryMasterAXI4MemModule