From a670f63c81b6630b8c1a84aeae4d395d7ed46f54 Mon Sep 17 00:00:00 2001
From: "Wesley W. Terpstra" <wesley@sifive.com>
Date: Wed, 23 Nov 2016 18:53:22 -0800
Subject: [PATCH] periphery: a handy trait to turn-off ExtMem

---
 src/main/scala/rocketchip/Periphery.scala | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/main/scala/rocketchip/Periphery.scala b/src/main/scala/rocketchip/Periphery.scala
index a654c8a0..af859346 100644
--- a/src/main/scala/rocketchip/Periphery.scala
+++ b/src/main/scala/rocketchip/Periphery.scala
@@ -72,6 +72,14 @@ trait PeripheryExtInterruptsModule {
 
 /////
 
+trait PeripheryNoMem extends TopNetwork {
+  private val channels = p(BankedL2Config).nMemoryChannels
+  require (channels == 0)
+  val mem = Seq()
+}
+
+/////
+
 trait PeripheryMasterAXI4Mem {
   this: TopNetwork =>
   val module: PeripheryMasterAXI4MemModule