Fix Cadence Incisive compile warning
The SystemVerilog LRM (IEEE 1800-2012) clause 20.15.1 ($random function) says: "The seed argument shall be an integral variable." This fixes the following compile warning: rand_value = $random($urandom); | ncelab: *W,WRNOTL (/home/scottj/rocket-chip/vsrc/TestDriver.v,34|23): Argument to out parameter is not a legal lvalue.
This commit is contained in:
parent
f069052969
commit
9f0fda01b3
@ -25,13 +25,14 @@ module TestDriver;
|
|||||||
void'($value$plusargs("max-cycles=%d", max_cycles));
|
void'($value$plusargs("max-cycles=%d", max_cycles));
|
||||||
verbose = $test$plusargs("verbose");
|
verbose = $test$plusargs("verbose");
|
||||||
|
|
||||||
// do not delete the line below.
|
// do not delete the lines below.
|
||||||
// $random function needs to be called with the seed once to affect all
|
// $random function needs to be called with the seed once to affect all
|
||||||
// the downstream $random functions within the Chisel-generated Verilog
|
// the downstream $random functions within the Chisel-generated Verilog
|
||||||
// code.
|
// code.
|
||||||
// $urandom is seeded via cmdline (+ntb_random_seed in VCS) but that
|
// $urandom is seeded via cmdline (+ntb_random_seed in VCS) but that
|
||||||
// doesn't seed $random.
|
// doesn't seed $random.
|
||||||
rand_value = $random($urandom);
|
rand_value = $urandom;
|
||||||
|
rand_value = $random(rand_value);
|
||||||
if (verbose) begin
|
if (verbose) begin
|
||||||
$fdisplay(stderr, "testing $random %0x", rand_value);
|
$fdisplay(stderr, "testing $random %0x", rand_value);
|
||||||
end
|
end
|
||||||
|
Loading…
Reference in New Issue
Block a user