fix Tile reset power on behavior
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@ -242,7 +242,9 @@ class Uncore(implicit val p: Parameters) extends Module
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prci.io.interrupts(i).seip := plic.io.harts(plic.cfg.context(i, 'S'))
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prci.io.interrupts(i).debug := debugModule.io.debugInterrupts(i)
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io.prci(i).reset := Reg(next=Reg(next=htif.io.cpu(i).reset)) // TODO
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io.prci(i).reset := reset || Reg(init = Bool(true),
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next=Reg(init = Bool(true),
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next=htif.io.cpu(i).reset)) // TODO
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}
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val bootROM = Module(new ROMSlave(TopUtils.makeBootROM()))
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