From 8db27a36c428e1dc47a48a059eaf3e79e212170f Mon Sep 17 00:00:00 2001 From: Howard Mao Date: Tue, 7 Jun 2016 11:06:25 -0700 Subject: [PATCH] fix Tile reset power on behavior --- src/main/scala/RocketChip.scala | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/main/scala/RocketChip.scala b/src/main/scala/RocketChip.scala index e6b23fd3..55a985d3 100644 --- a/src/main/scala/RocketChip.scala +++ b/src/main/scala/RocketChip.scala @@ -242,7 +242,9 @@ class Uncore(implicit val p: Parameters) extends Module prci.io.interrupts(i).seip := plic.io.harts(plic.cfg.context(i, 'S')) prci.io.interrupts(i).debug := debugModule.io.debugInterrupts(i) - io.prci(i).reset := Reg(next=Reg(next=htif.io.cpu(i).reset)) // TODO + io.prci(i).reset := reset || Reg(init = Bool(true), + next=Reg(init = Bool(true), + next=htif.io.cpu(i).reset)) // TODO } val bootROM = Module(new ROMSlave(TopUtils.makeBootROM()))