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fix Hasti and Smi converters

This commit is contained in:
Howard Mao 2016-07-15 15:39:00 -07:00
parent 66b9c5ad05
commit 897e6ccf8a
2 changed files with 12 additions and 6 deletions
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8
junctions/src/main/scala/hasti.scala
View File

@ -403,7 +403,11 @@ class HastiMasterIONastiIOConverter(implicit p: Parameters) extends HastiModule(
last = (len === UInt(0)))
assert(!r_queue.io.enq.valid || r_queue.io.enq.ready,
"HASTI -> NASTI converter queue overflow")
"NASTI -> HASTI converter queue overflow")
val next_count = r_queue.io.count +
r_queue.io.enq.valid -
r_queue.io.deq.ready
io.hasti.haddr := addr
io.hasti.hsize := size
@ -418,7 +422,7 @@ class HastiMasterIONastiIOConverter(implicit p: Parameters) extends HastiModule(
Mux(first, HTRANS_IDLE, HTRANS_BUSY)),
s_read -> MuxCase(HTRANS_BUSY, Seq(
first -> HTRANS_NONSEQ,
(r_queue.io.count <= UInt(1)) -> HTRANS_SEQ))))
(next_count <= UInt(1)) -> HTRANS_SEQ))))
when (io.nasti.aw.fire()) {
first := Bool(true)

10
junctions/src/main/scala/smi.scala
View File

@ -240,16 +240,18 @@ class SmiIONastiWriteIOConverter(val dataWidth: Int, val addrWidth: Int)
}
when (state === s_send) {
when (strb === UInt(0)) {
state := Mux(last, s_ack, s_data)
} .elsewhen (io.smi.req.ready || !strb(0)) {
when (io.smi.req.ready || !strb(0)) {
strb := strb >> jump
data := data >> Cat(jump, UInt(0, log2Up(dataWidth)))
addr := addr + jump
when (strb(0)) { state := s_ack }
}
}
when (io.smi.resp.fire()) { state := s_resp }
when (io.smi.resp.fire()) {
state := Mux(strb === UInt(0),
Mux(last, s_resp, s_data), s_send)
}
when (io.nasti.b.fire()) { state := s_idle }
}