riscv/rocket-chip
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improvements to implicit RocketConfiguration parameter

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This commit is contained in:
Henry Cook
2012-10-15 16:29:49 -07:00
parent a7a4e65690
commit 8970b635b2
8 changed files with 23 additions and 23 deletions
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8
rocket/src/main/scala/dpath_util.scala
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@ -57,9 +57,9 @@ class rocketDpathBTB(entries: Int) extends Component
io.target := mux.io.out.toUFix
}
class ioDpathPCR()(implicit conf: Configuration) extends Bundle()
class ioDpathPCR(implicit conf: RocketConfiguration) extends Bundle
{
val host = new ioHTIF()
val host = new ioHTIF
val r = new ioReadPort();
val w = new ioWritePort();
@ -86,9 +86,9 @@ class ioDpathPCR()(implicit conf: Configuration) extends Bundle()
val vec_nfregs = UFix(INPUT, 6)
}
class rocketDpathPCR()(implicit conf: Configuration) extends Component
class rocketDpathPCR(implicit conf: RocketConfiguration) extends Component
{
val io = new ioDpathPCR();
val io = new ioDpathPCR
val reg_epc = Reg() { UFix() };
val reg_badvaddr = Reg() { UFix() };