riscv/rocket-chip
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improvements to implicit RocketConfiguration parameter

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This commit is contained in:
Henry Cook
2012-10-15 16:29:49 -07:00
parent a7a4e65690
commit 8970b635b2
8 changed files with 23 additions and 23 deletions
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6
rocket/src/main/scala/dpath.scala
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@ -12,9 +12,9 @@ class ioDpathImem extends Bundle()
val resp_data = Bits(INPUT, 32);
}
class ioDpathAll()(implicit conf: Configuration) extends Bundle()
class ioDpathAll(implicit conf: RocketConfiguration) extends Bundle
{
val host = new ioHTIF()
val host = new ioHTIF
val ctrl = new ioCtrlDpath().flip
val dmem = new ioHellaCache
val dtlb = new ioDTLB_CPU_req_bundle().asOutput()
@ -28,7 +28,7 @@ class ioDpathAll()(implicit conf: Configuration) extends Bundle()
val vec_imul_resp = Bits(INPUT, hwacha.Constants.SZ_XLEN)
}
class rocketDpath()(implicit conf: Configuration) extends Component
class rocketDpath(implicit conf: RocketConfiguration) extends Component
{
val io = new ioDpathAll();