junctions: refactor the Crossing type
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@ -1,13 +1,19 @@
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package junctions
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package junctions
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import Chisel._
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import Chisel._
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class Crossing[T <: Data](gen: T) extends Bundle {
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class CrossingIO[T <: Data](gen: T) extends Bundle {
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val enq = Decoupled(gen).flip()
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// Enqueue clock domain
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val deq = Decoupled(gen)
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val enq_clock = Clock(INPUT)
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val enq_clock = Clock(INPUT)
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val enq_reset = Bool(INPUT) // synchronously deasserted wrt. enq_clock
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val enq = Decoupled(gen).flip()
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// Dequeue clock domain
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val deq_clock = Clock(INPUT)
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val deq_clock = Clock(INPUT)
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val enq_reset = Bool(INPUT)
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val deq_reset = Bool(INPUT) // synchronously deasserted wrt. deq_clock
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val deq_reset = Bool(INPUT)
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val deq = Decoupled(gen)
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}
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abstract class Crossing[T <: Data] extends Module {
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val io: CrossingIO[T]
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}
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}
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// Output is 1 for one cycle after any edge of 'in'
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// Output is 1 for one cycle after any edge of 'in'
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@ -86,8 +92,8 @@ class AsyncHandshakeSink[T <: Data](gen: T, sync: Int, clock: Clock, reset: Bool
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}
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}
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}
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}
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class AsyncHandshake[T <: Data](gen: T, sync: Int = 2) extends Module {
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class AsyncHandshake[T <: Data](gen: T, sync: Int = 2) extends Crossing[T] {
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val io = new Crossing(gen)
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val io = new CrossingIO(gen)
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require (sync >= 2)
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require (sync >= 2)
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val source = Module(new AsyncHandshakeSource(gen, sync, io.enq_clock, io.enq_reset))
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val source = Module(new AsyncHandshakeSource(gen, sync, io.enq_clock, io.enq_reset))
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@ -121,5 +121,5 @@ class AsyncMailbox extends BlackBox {
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// this mailbox just has a fixed width of 64 bits, which is enough
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// this mailbox just has a fixed width of 64 bits, which is enough
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// for our specific purpose here.
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// for our specific purpose here.
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val io = new Crossing(UInt(width=64))
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val io = new CrossingIO(UInt(width=64))
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}
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}
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