From 8142406d2e5a0138c8b520ecc4048e7a200c3ec2 Mon Sep 17 00:00:00 2001
From: "Wesley W. Terpstra" <wesley@sifive.com>
Date: Tue, 13 Sep 2016 15:34:56 -0700
Subject: [PATCH] junctions: refactor the Crossing type

---
 src/main/scala/junctions/crossing.scala       | 24 ++++++++++++-------
 .../scala/rocketchip/DebugTransport.scala     |  2 +-
 2 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/src/main/scala/junctions/crossing.scala b/src/main/scala/junctions/crossing.scala
index 802504c0..f0db6f86 100644
--- a/src/main/scala/junctions/crossing.scala
+++ b/src/main/scala/junctions/crossing.scala
@@ -1,13 +1,19 @@
 package junctions
 import Chisel._
 
-class Crossing[T <: Data](gen: T) extends Bundle {
-    val enq = Decoupled(gen).flip()
-    val deq = Decoupled(gen)
-    val enq_clock = Clock(INPUT)
-    val deq_clock = Clock(INPUT)
-    val enq_reset = Bool(INPUT)
-    val deq_reset = Bool(INPUT)
+class CrossingIO[T <: Data](gen: T) extends Bundle {
+  // Enqueue clock domain
+  val enq_clock = Clock(INPUT)
+  val enq_reset = Bool(INPUT) // synchronously deasserted wrt. enq_clock
+  val enq = Decoupled(gen).flip()
+  // Dequeue clock domain
+  val deq_clock = Clock(INPUT)
+  val deq_reset = Bool(INPUT) // synchronously deasserted wrt. deq_clock
+  val deq = Decoupled(gen)
+}
+
+abstract class Crossing[T <: Data] extends Module {
+  val io: CrossingIO[T]
 }
 
 // Output is 1 for one cycle after any edge of 'in'
@@ -86,8 +92,8 @@ class AsyncHandshakeSink[T <: Data](gen: T, sync: Int, clock: Clock, reset: Bool
   }
 }
 
-class AsyncHandshake[T <: Data](gen: T, sync: Int = 2) extends Module {
-  val io = new Crossing(gen)
+class AsyncHandshake[T <: Data](gen: T, sync: Int = 2) extends Crossing[T] {
+  val io = new CrossingIO(gen)
   require (sync >= 2)
 
   val source = Module(new AsyncHandshakeSource(gen, sync, io.enq_clock, io.enq_reset))
diff --git a/src/main/scala/rocketchip/DebugTransport.scala b/src/main/scala/rocketchip/DebugTransport.scala
index 846a6500..1371a16d 100644
--- a/src/main/scala/rocketchip/DebugTransport.scala
+++ b/src/main/scala/rocketchip/DebugTransport.scala
@@ -121,5 +121,5 @@ class AsyncMailbox extends BlackBox {
   // this mailbox just has a fixed width of 64 bits, which is enough
   // for our specific purpose here.
 
-  val io = new Crossing(UInt(width=64))
+  val io = new CrossingIO(UInt(width=64))
 }