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Bump Chisel and FIRRTL for annotations refactor (#1261)

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Also brings in an autoclonetype enhancement and some bug fixes
This commit is contained in:
Jack Koenig
2018-03-07 13:22:38 -05:00
committed by Henry Cook
parent d0b46c5b8f
commit 64b707cbb6
7 changed files with 9 additions and 17 deletions
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2
src/main/scala/devices/debug/Debug.scala
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@ -938,7 +938,7 @@ class TLDebugModuleInner(device: Device, getNComponents: () => Int, beatBytes: I
//------------------------
// DMI Register Control and Status
abstractCommandBusy := (ctrlStateReg != CtrlState(Waiting))
abstractCommandBusy := (ctrlStateReg =/= CtrlState(Waiting))
ABSTRACTCSWrEnLegal := (ctrlStateReg === CtrlState(Waiting))
COMMANDWrEnLegal := (ctrlStateReg === CtrlState(Waiting))