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write back meta data when cache miss even when coherence meta data is clean

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This commit is contained in:
Yunsup Lee 2015-03-12 14:36:46 -07:00
parent 8f8022379c
commit 5e40c8ba77
1 changed files with 3 additions and 3 deletions
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6
uncore/src/main/scala/cache.scala
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@ -868,9 +868,9 @@ class L2AcquireTracker(trackerId: Int, bankId: Int) extends L2XactTracker {
is(s_inner_grant) { is(s_inner_grant) {
io.inner.grant.valid := Bool(true) io.inner.grant.valid := Bool(true)
when(ignt_data_done) { when(ignt_data_done) {
val meta = pending_coh_on_ignt != xact_meta.coh val coh_dirty = pending_coh_on_ignt != xact_meta.coh
when(meta) { pending_coh := pending_coh_on_ignt } when(coh_dirty) { pending_coh := pending_coh_on_ignt }
state := Mux(meta, s_meta_write, state := Mux(!is_hit || coh_dirty, s_meta_write,
Mux(io.ignt().requiresAck(), s_inner_finish, s_idle)) Mux(io.ignt().requiresAck(), s_inner_finish, s_idle))
} }
} }