From 5e40c8ba77c7067fa686434db61cd9da4e3bb84f Mon Sep 17 00:00:00 2001 From: Yunsup Lee Date: Thu, 12 Mar 2015 14:36:46 -0700 Subject: [PATCH] write back meta data when cache miss even when coherence meta data is clean --- uncore/src/main/scala/cache.scala | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/uncore/src/main/scala/cache.scala b/uncore/src/main/scala/cache.scala index 87473587..9815855e 100644 --- a/uncore/src/main/scala/cache.scala +++ b/uncore/src/main/scala/cache.scala @@ -868,9 +868,9 @@ class L2AcquireTracker(trackerId: Int, bankId: Int) extends L2XactTracker { is(s_inner_grant) { io.inner.grant.valid := Bool(true) when(ignt_data_done) { - val meta = pending_coh_on_ignt != xact_meta.coh - when(meta) { pending_coh := pending_coh_on_ignt } - state := Mux(meta, s_meta_write, + val coh_dirty = pending_coh_on_ignt != xact_meta.coh + when(coh_dirty) { pending_coh := pending_coh_on_ignt } + state := Mux(!is_hit || coh_dirty, s_meta_write, Mux(io.ignt().requiresAck(), s_inner_finish, s_idle)) } }