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Merge pull request #925 from freechipsproject/fix-lazy-raw-modules

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diplomacy: provide default clock/reset for LazyRawModuleImp
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Yunsup Lee 2017-08-06 14:42:14 -07:00 committed by GitHub
commit 5030a8b15a
1 changed files with 12 additions and 6 deletions
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18
src/main/scala/diplomacy/LazyModule.scala
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@ -3,7 +3,7 @@
package freechips.rocketchip.diplomacy
import Chisel._
import chisel3.experimental.{BaseModule, RawModule, MultiIOModule}
import chisel3.experimental.{BaseModule, RawModule, MultiIOModule, withClockAndReset}
import chisel3.internal.sourceinfo.{SourceInfo, SourceLine, UnlocatableSourceInfo}
import freechips.rocketchip.config.Parameters
@ -151,13 +151,19 @@ trait LazyModuleImpLike extends BaseModule
override def desiredName = wrapper.moduleName
suggestName(wrapper.instanceName)
wrapper.instantiate()
implicit val p = wrapper.p
}
abstract class LazyModuleImp(val wrapper: LazyModule) extends Module with LazyModuleImpLike
abstract class LazyModuleImp(val wrapper: LazyModule) extends Module with LazyModuleImpLike {
wrapper.instantiate()
}
abstract class LazyMultiIOModuleImp(val wrapper: LazyModule) extends MultiIOModule with LazyModuleImpLike
abstract class LazyMultiIOModuleImp(val wrapper: LazyModule) extends MultiIOModule with LazyModuleImpLike {
wrapper.instantiate()
}
abstract class LazyRawModuleImp(val wrapper: LazyModule) extends RawModule with LazyModuleImpLike
abstract class LazyRawModuleImp(val wrapper: LazyModule) extends RawModule with LazyModuleImpLike {
withClockAndReset(Bool(false).asClock, Bool(true)) {
wrapper.instantiate()
}
}