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Merge pull request #792 from freechipsproject/fix-fdiv

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Fix FPU control bug for div/sqrt
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Andrew Waterman 2017-06-09 18:27:19 -07:00 committed by GitHub
commit 4a24e9a6c6
1 changed files with 3 additions and 8 deletions
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11
src/main/scala/tile/FPU.scala
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@ -754,15 +754,10 @@ class FPU(cfg: FPUParams)(implicit p: Parameters) extends FPUModule()(p) {
if (cfg.divSqrt) { if (cfg.divSqrt) {
val divSqrt_killed = Reg(Bool()) val divSqrt_killed = Reg(Bool())
makeDivSqrt(FType.S, wb_ctrl.singleOut) for (t <- floatTypes) {
fLen match { val tag = !mem_ctrl.singleOut // TODO typeTag
case 32 =>
case 64 => makeDivSqrt(FType.D, !wb_ctrl.singleOut)
}
def makeDivSqrt(t: FType, en: Bool) = {
val divSqrt = Module(new hardfloat.DivSqrtRecFN_small(t.exp, t.sig, 0)) val divSqrt = Module(new hardfloat.DivSqrtRecFN_small(t.exp, t.sig, 0))
divSqrt.io.inValid := en && mem_reg_valid && (mem_ctrl.div || mem_ctrl.sqrt) && !divSqrt_inFlight divSqrt.io.inValid := mem_reg_valid && tag === typeTag(t) && (mem_ctrl.div || mem_ctrl.sqrt) && !divSqrt_inFlight
divSqrt.io.sqrtOp := mem_ctrl.sqrt divSqrt.io.sqrtOp := mem_ctrl.sqrt
divSqrt.io.a := maxType.unsafeConvert(fpiu.io.out.bits.in.in1, t) divSqrt.io.a := maxType.unsafeConvert(fpiu.io.out.bits.in.in1, t)
divSqrt.io.b := maxType.unsafeConvert(fpiu.io.out.bits.in.in2, t) divSqrt.io.b := maxType.unsafeConvert(fpiu.io.out.bits.in.in2, t)