Disable printf/assert during reset
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@ -46,7 +46,7 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
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$(sim_dir)/libdramsim.a \
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+incdir+$(generated_dir) \
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+define+CLOCK_PERIOD=0.5 $(sim_vsrcs) $(sim_csrcs) \
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+define+PRINTF_COND=$(TB).verbose \
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+define+PRINTF_COND=$(TB).printf_cond \
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+libext+.v \
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#--------------------------------------------------------------------
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@ -33,6 +33,7 @@ module ZscaleTestHarness;
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reg [ 63:0] max_cycles = 0;
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reg [ 63:0] trace_count = 0;
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reg verbose = 0;
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wire printf_cond = verbose && !reset;
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integer stderr = 32'h80000002;
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integer i;
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reg [127:0] image [8191:0];
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@ -78,6 +78,7 @@ module rocketTestHarness;
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reg stats_active = 0;
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reg stats_tracking = 0;
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reg verbose = 0;
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wire printf_cond = verbose && !reset;
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integer stderr = 32'h80000002;
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`include `TBVFRAG
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