timer interrupt fixes
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parent
345f950eff
commit
44419511b7
@ -58,6 +58,7 @@ class ioCtrlDpath extends Bundle()
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val sboard_clr0a = UFix(5, 'input);
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val sboard_clr1 = Bool('input);
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val sboard_clr1a = UFix(5, 'input);
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val timer_int = Bool('input);
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}
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class ioCtrlAll extends Bundle()
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@ -69,13 +70,11 @@ class ioCtrlAll extends Bundle()
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val host = new ioHost(List("start"));
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val dtlb_busy = Bool('input);
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val dtlb_miss = Bool('input);
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// val itlb_miss = Bool('input);
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val xcpt_dtlb_ld = Bool('input);
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val xcpt_dtlb_st = Bool('input);
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val xcpt_itlb = Bool('input);
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val xcpt_ma_ld = Bool('input);
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val xcpt_ma_st = Bool('input);
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val timer_int = Bool('input);
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}
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class rocketCtrl extends Component
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@ -332,7 +331,6 @@ class rocketCtrl extends Component
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val jr_taken = (ex_reg_br_type === BR_JR);
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val j_taken = (ex_reg_br_type === BR_J);
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// io.dmem.req_val := ex_reg_mem_val;
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io.dmem.req_val := ex_reg_mem_val && ~io.dpath.killx;
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io.dmem.req_cmd := ex_reg_mem_cmd;
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io.dmem.req_type := ex_reg_mem_type;
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@ -384,7 +382,7 @@ class rocketCtrl extends Component
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// exception handling
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// FIXME: verify PC in MEM stage points to valid, restartable instruction
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val interrupt = io.dpath.status(SR_ET).toBool && io.dpath.status(15).toBool && io.timer_int;
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val interrupt = io.dpath.status(SR_ET).toBool && io.dpath.status(15).toBool && io.dpath.timer_int;
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val interrupt_cause = UFix(0x17, 5);
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val mem_exception =
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@ -421,9 +419,9 @@ class rocketCtrl extends Component
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// replay execute stage PC when the D$ is blocked, when the D$ misses, and for privileged instructions
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val replay_ex = (ex_reg_mem_val && !io.dmem.req_rdy) || io.dmem.resp_miss || mem_reg_privileged;
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// replay mem stage PC on a DTLB miss
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val replay_mem = io.dtlb_miss;
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// val replay_mem = Bool(false);
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val kill_ex = replay_ex || replay_mem;
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val kill_mem = mem_exception || replay_mem;
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@ -525,7 +523,6 @@ class rocketCtrl extends Component
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io.dpath.stalld := ctrl_stalld.toBool;
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// io.dpath.killf := take_pc | io.itlb_miss | ~io.imem.resp_val;
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io.dpath.killf := take_pc | ~io.imem.resp_val;
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io.dpath.killd := ctrl_killd.toBool;
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io.dpath.killx := kill_ex.toBool;
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@ -355,6 +355,7 @@ class rocketDpath extends Component
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pcr.io.host.from ^^ io.host.from;
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pcr.io.host.to ^^ io.host.to;
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io.ctrl.timer_int := pcr.io.timer_int;
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io.ctrl.status := pcr.io.status;
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io.ptbr := pcr.io.ptbr;
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io.debug.error_mode := pcr.io.debug.error_mode;
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