riscv/rocket-chip
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Add abstract class Tile

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This commit is contained in:
Adam Izraelevitz 2014-09-24 13:04:20 -07:00
parent 238f7761f6
commit 3e256439c9
1 changed files with 4 additions and 1 deletions
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5
rocket/src/main/scala/tile.scala
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@ -12,11 +12,14 @@ case object NTilePorts extends Field[Int]
case object NPTWPorts extends Field[Int]
case object BuildRoCC extends Field[Option[() => RoCC]]
class Tile(resetSignal: Bool = null) extends Module(_reset = resetSignal) {
abstract class Tile(resetSignal: Bool = null) extends Module(_reset = resetSignal) {
val io = new Bundle {
val tilelink = new TileLinkIO
val host = new HTIFIO
}
}
class RocketTile(resetSignal: Bool = null) extends Tile(resetSignal) {
val icache = Module(new Frontend, { case CacheName => "L1I"; case CoreName => "Rocket" })
val dcache = Module(new HellaCache, { case CacheName => "L1D" })