set missing port direction
Ideally, chisel should flag this as an error.
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		| @@ -21,7 +21,7 @@ class IBuf(implicit p: Parameters) extends CoreModule { | ||||
|   val io = new Bundle { | ||||
|     val imem = Decoupled(new FrontendResp).flip | ||||
|     val kill = Bool(INPUT) | ||||
|     val pc = UInt(width = vaddrBitsExtended) | ||||
|     val pc = UInt(OUTPUT, vaddrBitsExtended) | ||||
|     val btb_resp = new BTBResp().asOutput | ||||
|     val inst = Vec(retireWidth, Decoupled(new Instruction)) | ||||
|   } | ||||
|   | ||||
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