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Configs: add a parameter to control the memory subsystem interface

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This commit is contained in:
Wesley W. Terpstra
2016-06-01 15:00:48 -07:00
committed by Andrew Waterman
parent 2ddada1732
commit 2086c0d603
2 changed files with 10 additions and 0 deletions
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9
src/main/scala/RocketChip.scala
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@ -11,8 +11,17 @@ import rocket.Util._
/** Top-level parameters of RocketChip, values set in e.g. PublicConfigs.scala */
/** Options for memory bus interface */
object BusType {
sealed trait EnumVal
case object AXI extends EnumVal
case object AHB extends EnumVal
val busTypes = Seq(AXI, AHB)
}
/** Number of memory channels */
case object NMemoryChannels extends Field[Int]
case object TMemoryChannels extends Field[BusType.EnumVal]
/** Number of banks per memory channel */
case object NBanksPerMemoryChannel extends Field[Int]
/** Least significant bit of address used for bank partitioning */