  Henry StylesandGitHub
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cd9a525a66
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Merge pull request #50 from sifive/update_readme_vc707_vivado2016dot4
U500 VC707 FPGA Dev Kit : update required Vivado version from 2016.1 to 2016.4
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2018-04-06 10:55:00 -07:00 |
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Henry Styles
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0e77cb9d87
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U500 VC707 FPGA Dev Kit : update required Vivado version from 2016.1 to 2016.4 to fix synthesis bug effecting debug module
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2018-04-06 10:54:03 -07:00 |
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Henry StylesandGitHub
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c0a2869e56
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Merge pull request #49 from sifive/update_vc707_sdboot
Correct GPIO/SPI/UART base address for VC707 SDBOOT
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2018-04-05 22:13:22 -07:00 |
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Henry Styles
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0663bb7627
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Correct GPIO/SPI/UART base addresse for vc707 sdboot
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2018-04-05 22:11:39 -07:00 |
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Henry StylesandGitHub
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275e2cd693
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Merge pull request #4 from sifive/fix_u500vc707devkit_dot_img
Update U500 VC707 Dev Kit BootROM image for SDBoot
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2016-11-29 20:38:00 -08:00 |
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Henry Styles
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9fbf40da42
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fix U500 BootROM image for SDBoot
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2016-11-29 20:32:16 -08:00 |
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