riscv/fpga-shells
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fpga-shells/xilinx/vc707/constraints
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Henry Styles dc6bb40d1b VC707 : update contraints file to match PCIe and MIG signal names now claimed directly from the IP
2017-10-23 17:27:36 -07:00
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vc707-master.xdc VC707 : update contraints file to match PCIe and MIG signal names now claimed directly from the IP 2017-10-23 17:27:36 -07:00