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fpga-shells/xilinx/common/tcl/place.tcl
2017-08-16 11:23:45 -07:00

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331 B
Tcl

# See LICENSE for license details.
# Place the current design
place_design -directive Explore
# Optimize the current placed netlist
phys_opt_design -directive Explore
# Optimize dynamic power using intelligent clock gating
power_opt_design
# Checkpoint the current design
write_checkpoint -force [file join $wrkdir post_place]