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fpga-shells/xilinx/arty/constraints/arty-config.xdc
2017-08-16 11:23:45 -07:00

6 lines
125 B
Tcl

set_property -dict [list \
CONFIG_VOLTAGE {3.3} \
CFGBVS {VCCO} \
BITSTREAM.CONFIG.SPI_BUSWIDTH {4} \
] [current_design]