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fpga-shells/xilinx/common/tcl/route.tcl
2017-08-16 11:23:45 -07:00

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Tcl

# See LICENSE for license details.
# Route the current design
route_design -directive Explore
# Optimize the current design post routing
phys_opt_design -directive Explore
# Checkpoint the current design
write_checkpoint -force [file join $wrkdir post_route]