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vc707: Updates to the constraints and shell

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Shreesha Srinath committed 2017-08-17 18:51:01 -07:00
1 parent ab8cf0775f
commit c58e79f155
2 files changed
+6 -10
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xilinx/vc707/constraints/vc707-master.xdc
+3 -4
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@@ -29,10 +29,9 @@ set_property PACKAGE_PIN AR34 [get_ports uart_rtsn]
set_property IOSTANDARD LVCMOS18 [get_ports uart_rtsn]
set_property IOB TRUE [get_ports uart_rtsn]
# FIXME: shreesha: I need to see if these matter and add them back
# currently everything works without it....
#set_property IOB TRUE [get_cells "top/RocketChipTop/uarts_0/txm/out_reg"]
#set_property IOB TRUE [get_cells "uart_rx_sync_reg[0]"]
# Platform specific constraints
set_property IOB TRUE [get_cells "U500VC707System/uarts_0/txm/out_reg"]
set_property IOB TRUE [get_cells "uart_rx_sync_0"]
# PCI Express
#FMC 1 refclk