vc707shell: work-around too many '++'s => stack overflow issue
This commit is contained in:
Wesley W. Terpstra
parent
080119ec7a
commit
9d02f530fc
@ -136,223 +136,224 @@ trait HasVC707ChipLink { this: VC707Shell =>
|
||||
)
|
||||
|
||||
ElaborationArtefacts.add(
|
||||
"""vc707chiplink.xdc""",
|
||||
"""set_property PACKAGE_PIN AF39 [get_ports """ ++ direction0Pins ++ """_clk]
|
||||
set_property PACKAGE_PIN AD40 [get_ports {""" ++ direction0Pins ++ """_data[0]}]
|
||||
set_property PACKAGE_PIN AD41 [get_ports {""" ++ direction0Pins ++ """_data[1]}]
|
||||
set_property PACKAGE_PIN AF41 [get_ports {""" ++ direction0Pins ++ """_data[2]}]
|
||||
set_property PACKAGE_PIN AG41 [get_ports {""" ++ direction0Pins ++ """_data[3]}]
|
||||
set_property PACKAGE_PIN AK39 [get_ports {""" ++ direction0Pins ++ """_data[4]}]
|
||||
set_property PACKAGE_PIN AL39 [get_ports {""" ++ direction0Pins ++ """_data[5]}]
|
||||
set_property PACKAGE_PIN AJ42 [get_ports {""" ++ direction0Pins ++ """_data[6]}]
|
||||
set_property PACKAGE_PIN AK42 [get_ports {""" ++ direction0Pins ++ """_data[7]}]
|
||||
set_property PACKAGE_PIN AL41 [get_ports {""" ++ direction0Pins ++ """_data[8]}]
|
||||
set_property PACKAGE_PIN AL42 [get_ports {""" ++ direction0Pins ++ """_data[9]}]
|
||||
set_property PACKAGE_PIN AF42 [get_ports {""" ++ direction0Pins ++ """_data[10]}]
|
||||
set_property PACKAGE_PIN AG42 [get_ports {""" ++ direction0Pins ++ """_data[11]}]
|
||||
set_property PACKAGE_PIN AD38 [get_ports {""" ++ direction0Pins ++ """_data[12]}]
|
||||
set_property PACKAGE_PIN AE38 [get_ports {""" ++ direction0Pins ++ """_data[13]}]
|
||||
set_property PACKAGE_PIN AC40 [get_ports {""" ++ direction0Pins ++ """_data[14]}]
|
||||
set_property PACKAGE_PIN AC41 [get_ports {""" ++ direction0Pins ++ """_data[15]}]
|
||||
set_property PACKAGE_PIN AD42 [get_ports {""" ++ direction0Pins ++ """_data[16]}]
|
||||
set_property PACKAGE_PIN AE42 [get_ports {""" ++ direction0Pins ++ """_data[17]}]
|
||||
set_property PACKAGE_PIN AJ38 [get_ports {""" ++ direction0Pins ++ """_data[18]}]
|
||||
set_property PACKAGE_PIN AK38 [get_ports {""" ++ direction0Pins ++ """_data[19]}]
|
||||
set_property PACKAGE_PIN AB41 [get_ports {""" ++ direction0Pins ++ """_data[20]}]
|
||||
set_property PACKAGE_PIN AB42 [get_ports {""" ++ direction0Pins ++ """_data[21]}]
|
||||
set_property PACKAGE_PIN Y42 [get_ports {""" ++ direction0Pins ++ """_data[22]}]
|
||||
set_property PACKAGE_PIN AA42 [get_ports {""" ++ direction0Pins ++ """_data[23]}]
|
||||
set_property PACKAGE_PIN Y39 [get_ports {""" ++ direction0Pins ++ """_data[24]}]
|
||||
set_property PACKAGE_PIN AA39 [get_ports {""" ++ direction0Pins ++ """_data[25]}]
|
||||
set_property PACKAGE_PIN W40 [get_ports {""" ++ direction0Pins ++ """_data[26]}]
|
||||
set_property PACKAGE_PIN Y40 [get_ports {""" ++ direction0Pins ++ """_data[27]}]
|
||||
set_property PACKAGE_PIN AB38 [get_ports {""" ++ direction0Pins ++ """_data[28]}]
|
||||
set_property PACKAGE_PIN AB39 [get_ports {""" ++ direction0Pins ++ """_data[29]}]
|
||||
set_property PACKAGE_PIN AC38 [get_ports {""" ++ direction0Pins ++ """_data[30]}]
|
||||
set_property PACKAGE_PIN AC39 [get_ports {""" ++ direction0Pins ++ """_data[31]}]
|
||||
set_property PACKAGE_PIN AJ40 [get_ports """ ++ direction0Pins ++ """_send]
|
||||
set_property PACKAGE_PIN AJ41 [get_ports """ ++ direction0Pins ++ """_rst]
|
||||
"""vc707chiplink.xdc""", s"""
|
||||
set_property PACKAGE_PIN AF39 [get_ports ${direction0Pins}_clk]
|
||||
set_property PACKAGE_PIN AD40 [get_ports {${direction0Pins}_data[0]}]
|
||||
set_property PACKAGE_PIN AD41 [get_ports {${direction0Pins}_data[1]}]
|
||||
set_property PACKAGE_PIN AF41 [get_ports {${direction0Pins}_data[2]}]
|
||||
set_property PACKAGE_PIN AG41 [get_ports {${direction0Pins}_data[3]}]
|
||||
set_property PACKAGE_PIN AK39 [get_ports {${direction0Pins}_data[4]}]
|
||||
set_property PACKAGE_PIN AL39 [get_ports {${direction0Pins}_data[5]}]
|
||||
set_property PACKAGE_PIN AJ42 [get_ports {${direction0Pins}_data[6]}]
|
||||
set_property PACKAGE_PIN AK42 [get_ports {${direction0Pins}_data[7]}]
|
||||
set_property PACKAGE_PIN AL41 [get_ports {${direction0Pins}_data[8]}]
|
||||
set_property PACKAGE_PIN AL42 [get_ports {${direction0Pins}_data[9]}]
|
||||
set_property PACKAGE_PIN AF42 [get_ports {${direction0Pins}_data[10]}]
|
||||
set_property PACKAGE_PIN AG42 [get_ports {${direction0Pins}_data[11]}]
|
||||
set_property PACKAGE_PIN AD38 [get_ports {${direction0Pins}_data[12]}]
|
||||
set_property PACKAGE_PIN AE38 [get_ports {${direction0Pins}_data[13]}]
|
||||
set_property PACKAGE_PIN AC40 [get_ports {${direction0Pins}_data[14]}]
|
||||
set_property PACKAGE_PIN AC41 [get_ports {${direction0Pins}_data[15]}]
|
||||
set_property PACKAGE_PIN AD42 [get_ports {${direction0Pins}_data[16]}]
|
||||
set_property PACKAGE_PIN AE42 [get_ports {${direction0Pins}_data[17]}]
|
||||
set_property PACKAGE_PIN AJ38 [get_ports {${direction0Pins}_data[18]}]
|
||||
set_property PACKAGE_PIN AK38 [get_ports {${direction0Pins}_data[19]}]
|
||||
set_property PACKAGE_PIN AB41 [get_ports {${direction0Pins}_data[20]}]
|
||||
set_property PACKAGE_PIN AB42 [get_ports {${direction0Pins}_data[21]}]
|
||||
set_property PACKAGE_PIN Y42 [get_ports {${direction0Pins}_data[22]}]
|
||||
set_property PACKAGE_PIN AA42 [get_ports {${direction0Pins}_data[23]}]
|
||||
set_property PACKAGE_PIN Y39 [get_ports {${direction0Pins}_data[24]}]
|
||||
set_property PACKAGE_PIN AA39 [get_ports {${direction0Pins}_data[25]}]
|
||||
set_property PACKAGE_PIN W40 [get_ports {${direction0Pins}_data[26]}]
|
||||
set_property PACKAGE_PIN Y40 [get_ports {${direction0Pins}_data[27]}]
|
||||
set_property PACKAGE_PIN AB38 [get_ports {${direction0Pins}_data[28]}]
|
||||
set_property PACKAGE_PIN AB39 [get_ports {${direction0Pins}_data[29]}]
|
||||
set_property PACKAGE_PIN AC38 [get_ports {${direction0Pins}_data[30]}]
|
||||
set_property PACKAGE_PIN AC39 [get_ports {${direction0Pins}_data[31]}]
|
||||
set_property PACKAGE_PIN AJ40 [get_ports ${direction0Pins}_send]
|
||||
set_property PACKAGE_PIN AJ41 [get_ports ${direction0Pins}_rst]
|
||||
|
||||
set_property PACKAGE_PIN U39 [get_ports """ ++ direction1Pins ++ """_clk]
|
||||
set_property PACKAGE_PIN U37 [get_ports {""" ++ direction1Pins ++ """_data[0]}]
|
||||
set_property PACKAGE_PIN U38 [get_ports {""" ++ direction1Pins ++ """_data[1]}]
|
||||
set_property PACKAGE_PIN U36 [get_ports {""" ++ direction1Pins ++ """_data[2]}]
|
||||
set_property PACKAGE_PIN T37 [get_ports {""" ++ direction1Pins ++ """_data[3]}]
|
||||
set_property PACKAGE_PIN U32 [get_ports {""" ++ direction1Pins ++ """_data[4]}]
|
||||
set_property PACKAGE_PIN U33 [get_ports {""" ++ direction1Pins ++ """_data[5]}]
|
||||
set_property PACKAGE_PIN V33 [get_ports {""" ++ direction1Pins ++ """_data[6]}]
|
||||
set_property PACKAGE_PIN V34 [get_ports {""" ++ direction1Pins ++ """_data[7]}]
|
||||
set_property PACKAGE_PIN P35 [get_ports {""" ++ direction1Pins ++ """_data[8]}]
|
||||
set_property PACKAGE_PIN P36 [get_ports {""" ++ direction1Pins ++ """_data[9]}]
|
||||
set_property PACKAGE_PIN W32 [get_ports {""" ++ direction1Pins ++ """_data[10]}]
|
||||
set_property PACKAGE_PIN W33 [get_ports {""" ++ direction1Pins ++ """_data[11]}]
|
||||
set_property PACKAGE_PIN R38 [get_ports {""" ++ direction1Pins ++ """_data[12]}]
|
||||
set_property PACKAGE_PIN R39 [get_ports {""" ++ direction1Pins ++ """_data[13]}]
|
||||
set_property PACKAGE_PIN U34 [get_ports {""" ++ direction1Pins ++ """_data[14]}]
|
||||
set_property PACKAGE_PIN T35 [get_ports {""" ++ direction1Pins ++ """_data[15]}]
|
||||
set_property PACKAGE_PIN R33 [get_ports {""" ++ direction1Pins ++ """_data[16]}]
|
||||
set_property PACKAGE_PIN R34 [get_ports {""" ++ direction1Pins ++ """_data[17]}]
|
||||
set_property PACKAGE_PIN N33 [get_ports {""" ++ direction1Pins ++ """_data[18]}]
|
||||
set_property PACKAGE_PIN N34 [get_ports {""" ++ direction1Pins ++ """_data[19]}]
|
||||
set_property PACKAGE_PIN P32 [get_ports {""" ++ direction1Pins ++ """_data[20]}]
|
||||
set_property PACKAGE_PIN P33 [get_ports {""" ++ direction1Pins ++ """_data[21]}]
|
||||
set_property PACKAGE_PIN V35 [get_ports {""" ++ direction1Pins ++ """_data[22]}]
|
||||
set_property PACKAGE_PIN V36 [get_ports {""" ++ direction1Pins ++ """_data[23]}]
|
||||
set_property PACKAGE_PIN W36 [get_ports {""" ++ direction1Pins ++ """_data[24]}]
|
||||
set_property PACKAGE_PIN W37 [get_ports {""" ++ direction1Pins ++ """_data[25]}]
|
||||
set_property PACKAGE_PIN T32 [get_ports {""" ++ direction1Pins ++ """_data[26]}]
|
||||
set_property PACKAGE_PIN R32 [get_ports {""" ++ direction1Pins ++ """_data[27]}]
|
||||
set_property PACKAGE_PIN V39 [get_ports {""" ++ direction1Pins ++ """_data[28]}]
|
||||
set_property PACKAGE_PIN V40 [get_ports {""" ++ direction1Pins ++ """_data[29]}]
|
||||
set_property PACKAGE_PIN P37 [get_ports {""" ++ direction1Pins ++ """_data[30]}]
|
||||
set_property PACKAGE_PIN P38 [get_ports {""" ++ direction1Pins ++ """_data[31]}]
|
||||
set_property PACKAGE_PIN T36 [get_ports """ ++ direction1Pins ++ """_send]
|
||||
set_property PACKAGE_PIN R37 [get_ports """ ++ direction1Pins ++ """_rst]
|
||||
set_property PACKAGE_PIN U39 [get_ports ${direction1Pins}_clk]
|
||||
set_property PACKAGE_PIN U37 [get_ports {${direction1Pins}_data[0]}]
|
||||
set_property PACKAGE_PIN U38 [get_ports {${direction1Pins}_data[1]}]
|
||||
set_property PACKAGE_PIN U36 [get_ports {${direction1Pins}_data[2]}]
|
||||
set_property PACKAGE_PIN T37 [get_ports {${direction1Pins}_data[3]}]
|
||||
set_property PACKAGE_PIN U32 [get_ports {${direction1Pins}_data[4]}]
|
||||
set_property PACKAGE_PIN U33 [get_ports {${direction1Pins}_data[5]}]
|
||||
set_property PACKAGE_PIN V33 [get_ports {${direction1Pins}_data[6]}]
|
||||
set_property PACKAGE_PIN V34 [get_ports {${direction1Pins}_data[7]}]
|
||||
set_property PACKAGE_PIN P35 [get_ports {${direction1Pins}_data[8]}]
|
||||
set_property PACKAGE_PIN P36 [get_ports {${direction1Pins}_data[9]}]
|
||||
set_property PACKAGE_PIN W32 [get_ports {${direction1Pins}_data[10]}]
|
||||
set_property PACKAGE_PIN W33 [get_ports {${direction1Pins}_data[11]}]
|
||||
set_property PACKAGE_PIN R38 [get_ports {${direction1Pins}_data[12]}]
|
||||
set_property PACKAGE_PIN R39 [get_ports {${direction1Pins}_data[13]}]
|
||||
set_property PACKAGE_PIN U34 [get_ports {${direction1Pins}_data[14]}]
|
||||
set_property PACKAGE_PIN T35 [get_ports {${direction1Pins}_data[15]}]
|
||||
set_property PACKAGE_PIN R33 [get_ports {${direction1Pins}_data[16]}]
|
||||
set_property PACKAGE_PIN R34 [get_ports {${direction1Pins}_data[17]}]
|
||||
set_property PACKAGE_PIN N33 [get_ports {${direction1Pins}_data[18]}]
|
||||
set_property PACKAGE_PIN N34 [get_ports {${direction1Pins}_data[19]}]
|
||||
set_property PACKAGE_PIN P32 [get_ports {${direction1Pins}_data[20]}]
|
||||
set_property PACKAGE_PIN P33 [get_ports {${direction1Pins}_data[21]}]
|
||||
set_property PACKAGE_PIN V35 [get_ports {${direction1Pins}_data[22]}]
|
||||
set_property PACKAGE_PIN V36 [get_ports {${direction1Pins}_data[23]}]
|
||||
set_property PACKAGE_PIN W36 [get_ports {${direction1Pins}_data[24]}]
|
||||
set_property PACKAGE_PIN W37 [get_ports {${direction1Pins}_data[25]}]
|
||||
set_property PACKAGE_PIN T32 [get_ports {${direction1Pins}_data[26]}]
|
||||
set_property PACKAGE_PIN R32 [get_ports {${direction1Pins}_data[27]}]
|
||||
set_property PACKAGE_PIN V39 [get_ports {${direction1Pins}_data[28]}]
|
||||
set_property PACKAGE_PIN V40 [get_ports {${direction1Pins}_data[29]}]
|
||||
set_property PACKAGE_PIN P37 [get_ports {${direction1Pins}_data[30]}]
|
||||
set_property PACKAGE_PIN P38 [get_ports {${direction1Pins}_data[31]}]
|
||||
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[31]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[30]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[29]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[28]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[27]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[26]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[25]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[24]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[23]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[22]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[21]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[20]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[19]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[18]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[17]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[16]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[15]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[14]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[13]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[12]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[11]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[10]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[9]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[8]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[7]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[6]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[5]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[4]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[3]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[2]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[1]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction0Pins ++ """_data[0]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[31]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[30]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[29]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[28]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[27]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[26]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[25]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[24]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[23]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[22]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[21]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[20]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[19]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[18]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[17]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[16]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[15]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[14]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[13]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[12]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[11]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[10]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[9]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[8]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[7]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[6]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[5]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[4]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[3]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[2]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[1]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {""" ++ direction1Pins ++ """_data[0]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[31]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[30]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[29]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[28]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[27]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[26]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[25]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[24]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[23]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[22]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[21]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[20]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[19]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[18]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[17]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[16]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[15]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[14]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[13]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[12]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[11]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[10]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[9]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[8]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[7]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[6]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[5]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[4]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[3]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[2]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[1]}]
|
||||
set_property SLEW FAST [get_ports {""" ++ direction1Pins ++ """_data[0]}]
|
||||
set_property PACKAGE_PIN T36 [get_ports ${direction1Pins}_send]
|
||||
set_property PACKAGE_PIN R37 [get_ports ${direction1Pins}_rst]
|
||||
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[31]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[30]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[29]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[28]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[27]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[26]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[25]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[24]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[23]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[22]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[21]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[20]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[19]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[18]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[17]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[16]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[15]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[14]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[13]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[12]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[11]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[10]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[9]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[8]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[7]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[6]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[5]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[4]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[3]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[2]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[1]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction0Pins}_data[0]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[31]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[30]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[29]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[28]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[27]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[26]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[25]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[24]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[23]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[22]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[21]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[20]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[19]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[18]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[17]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[16]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[15]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[14]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[13]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[12]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[11]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[10]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[9]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[8]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[7]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[6]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[5]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[4]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[3]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[2]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[1]}]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports {${direction1Pins}_data[0]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[31]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[30]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[29]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[28]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[27]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[26]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[25]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[24]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[23]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[22]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[21]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[20]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[19]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[18]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[17]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[16]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[15]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[14]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[13]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[12]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[11]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[10]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[9]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[8]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[7]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[6]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[5]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[4]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[3]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[2]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[1]}]
|
||||
set_property SLEW FAST [get_ports {${direction1Pins}_data[0]}]
|
||||
|
||||
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports """ ++ direction0Pins ++ """_clk]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports """ ++ direction0Pins ++ """_rst]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports """ ++ direction0Pins ++ """_send]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports """ ++ direction1Pins ++ """_clk]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports """ ++ direction1Pins ++ """_rst]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports """ ++ direction1Pins ++ """_send]
|
||||
set_property SLEW FAST [get_ports """ ++ direction1Pins ++ """_clk]
|
||||
set_property SLEW FAST [get_ports """ ++ direction1Pins ++ """_rst]
|
||||
set_property SLEW FAST [get_ports """ ++ direction1Pins ++ """_send]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports ${direction0Pins}_clk]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports ${direction0Pins}_rst]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports ${direction0Pins}_send]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports ${direction1Pins}_clk]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports ${direction1Pins}_rst]
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports ${direction1Pins}_send]
|
||||
set_property SLEW FAST [get_ports ${direction1Pins}_clk]
|
||||
set_property SLEW FAST [get_ports ${direction1Pins}_rst]
|
||||
set_property SLEW FAST [get_ports ${direction1Pins}_send]
|
||||
|
||||
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[31]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[30]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[29]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[28]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[27]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[26]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[25]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[24]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[23]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[22]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[21]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[20]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[19]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[18]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[17]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[16]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[15]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[14]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[13]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[12]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[11]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[10]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[9]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[8]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[7]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[6]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[5]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[4]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[3]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[2]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[1]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_data[0]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_send]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_clk]
|
||||
set_property OFFCHIP_TERM NONE [get_ports """ ++ direction1Pins ++ """_rst]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[31]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[30]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[29]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[28]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[27]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[26]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[25]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[24]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[23]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[22]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[21]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[20]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[19]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[18]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[17]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[16]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[15]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[14]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[13]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[12]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[11]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[10]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[9]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[8]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[7]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[6]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[5]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[4]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[3]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[2]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[1]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_data[0]]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_send]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_clk]
|
||||
set_property OFFCHIP_TERM NONE [get_ports ${direction1Pins}_rst]
|
||||
|
||||
# Aloe reset sent to FPGA
|
||||
set_property IOSTANDARD LVCMOS18 [get_ports ereset_n]
|
||||
@ -365,7 +366,6 @@ trait HasVC707ChipLink { this: VC707Shell =>
|
||||
set_property IOB TRUE [get_cells -of_objects [all_fanin -flat -startpoints_only [get_ports "chiplink_c2b_send"]]]
|
||||
"""
|
||||
)
|
||||
|
||||
}
|
||||
|
||||
def connectChipLink(dut: { val chiplink: HeterogeneousBag[WideDataLayerPort] } , iofpga: Boolean = false): Unit = {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user