Merge pull request #8 from sifive/replace-env-vars-with-cli-args
Restructure Tcl script entrypoint.
This commit is contained in:
commit
66e5ac2e9e
@ -10,8 +10,8 @@ file mkdir $ipdir
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update_ip_catalog -rebuild
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update_ip_catalog -rebuild
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# Generate IP implementations. Vivado TCL emitted from Chisel Blackboxes
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# Generate IP implementations. Vivado TCL emitted from Chisel Blackboxes
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foreach ipvivadotcl $ipvivadotcls {
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foreach ip_vivado_tcl $ip_vivado_tcls {
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source $ipvivadotcl
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source $ip_vivado_tcl
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}
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}
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# Optional board-specific ip script
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# Optional board-specific ip script
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set boardiptcl [file join $boarddir tcl ip.tcl]
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set boardiptcl [file join $boarddir tcl ip.tcl]
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@ -1,13 +1,55 @@
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# See LICENSE for license details.
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# See LICENSE for license details.
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# Set the variable for the directory that includes all scripts
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# Process command line arguments
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set scriptdir [file dirname [info script]]
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# http://wiki.tcl.tk/1730
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set ip_vivado_tcls {}
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while {[llength $argv]} {
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set argv [lassign $argv[set argv {}] flag]
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switch -glob $flag {
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-top-module {
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set argv [lassign $argv[set argv {}] top]
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}
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-F {
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# This should be a simple file format with one filepath per line
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set argv [lassign $argv[set argv {}] vsrc_manifest]
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}
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-board {
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set argv [lassign $argv[set argv {}] board]
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}
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-ip-vivado-tcls {
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set argv [lassign $argv[set argv {}] ip_vivado_tcls]
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}
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-pre-impl-debug-tcl {
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set argv [lassign $argv[set argv {}] pre_impl_debug_tcl]
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}
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-post-impl-debug-tcl {
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set argv [lassign $argv[set argv {}] post_impl_debug_tcl]
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}
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default {
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return -code error [list {unknown option} $flag]
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}
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}
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}
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if {![info exists top]} {
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return -code error [list {--top-module option is required}]
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}
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if {![info exists vsrc_manifest]} {
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return -code error [list {-F option is required}]
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}
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if {![info exists board]} {
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return -code error [list {--board option is required}]
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}
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# Set the variable for all the common files
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# Set the variable for all the common files
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set commondir [file dirname $scriptdir]
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set commondir [file dirname $scriptdir]
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# Set the variable that points to board specific files
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# Set the variable that points to board specific files
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set boarddir [file join [file dirname $commondir] $name]
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set boarddir [file join [file dirname $commondir] $board]
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source [file join $boarddir tcl board.tcl]
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# Set the variable that points to board constraint files
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# Set the variable that points to board constraint files
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set constraintsdir [file join $boarddir constraints]
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set constraintsdir [file join $boarddir constraints]
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@ -21,9 +63,6 @@ set wrkdir [file join [pwd] obj]
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# Create the directory for IPs
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# Create the directory for IPs
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set ipdir [file join $wrkdir ip]
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set ipdir [file join $wrkdir ip]
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# Set the top for the design based on an environment variable
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set top $::env(FPGA_TOP_SYSTEM)
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# Create an in-memory project
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# Create an in-memory project
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create_project -part $part_fpga -in_memory
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create_project -part $part_fpga -in_memory
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@ -41,16 +80,29 @@ if {[get_filesets -quiet sources_1] eq ""} {
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}
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}
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set obj [current_fileset]
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set obj [current_fileset]
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# Add verilog files TCL from VSRCSVIVADOTCL environment variable
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# Add verilog files from manifest
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if {[info exists ::env(VSRCSVIVADOTCL)]} {
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proc load_vsrc_manifest {obj vsrc_manifest} {
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source $::env(VSRCSVIVADOTCL)
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set fp [open $vsrc_manifest r]
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set files [lsearch -not -exact -all -inline [split [read $fp] "\n"] {}]
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set relative_files {}
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foreach path $files {
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if {[string match {/*} $path]} {
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lappend relative_files $path
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} elseif {![string match {#*} $path]} {
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lappend relative_files [file join [file dirname $vsrc_manifest] $path]
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}
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}
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add_files -norecurse -fileset $obj {*}$relative_files
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close $fp
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}
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}
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# Add IP Vivado TCL from IPVIVADOTCL environment variable
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load_vsrc_manifest $obj $vsrc_manifest
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if {[info exists ::env(IPVIVADOTCLS)]} {
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# Add IP Vivado TCL
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if {$ip_vivado_tcls ne {}} {
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# Split string into words even with multiple consecutive spaces
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# Split string into words even with multiple consecutive spaces
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# http://wiki.tcl.tk/989
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# http://wiki.tcl.tk/989
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set ipvivadotcls [regexp -inline -all -- {\S+} $::env(IPVIVADOTCLS)]
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set ip_vivado_tcls [regexp -inline -all -- {\S+} $ip_vivado_tcls]
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}
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}
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if {[get_filesets -quiet sim_1] eq ""} {
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if {[get_filesets -quiet sim_1] eq ""} {
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@ -1,11 +1,20 @@
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# See LICENSE for license details.
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# See LICENSE for license details.
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# Set the variable for the directory that includes all scripts
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set scriptdir [file dirname [info script]]
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# Set up variables and Vivado objects
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source [file join $scriptdir "prologue.tcl"]
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# Initialize Vivado project files
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source [file join $scriptdir "init.tcl"]
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# Synthesize the design
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# Synthesize the design
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source [file join $scriptdir "synth.tcl"]
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source [file join $scriptdir "synth.tcl"]
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# Pre-implementation debug
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# Pre-implementation debug
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if {[info exists ::env(PRE_IMPL_DEBUG_TCL)]} {
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if {[info exists pre_impl_debug_tcl]} {
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source [file join $scriptdir $::env(PRE_IMPL_DEBUG_TCL)]
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source [file join $scriptdir $pre_impl_debug_tcl]
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}
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}
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# Post synthesis optimization
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# Post synthesis optimization
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@ -21,8 +30,8 @@ source [file join $scriptdir "route.tcl"]
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source [file join $scriptdir "bitstream.tcl"]
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source [file join $scriptdir "bitstream.tcl"]
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# Post-implementation debug
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# Post-implementation debug
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if {[info exists ::env(POST_IMPL_DEBUG_TCL)]} {
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if {[info exists post_impl_debug_tcl)]} {
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source [file join $scriptdir $::env(POST_IMPL_DEBUG_TCL)]
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source [file join $scriptdir $post_impl_debug_tcl]
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}
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}
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# Create reports for the current implementation
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# Create reports for the current implementation
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